Meta AI Introduces MetaRoCE: A Clean-Sheet RDMA Transport Built for AI-Scale Ethernet

Training and serving frontier models is now a networking problem as much as a compute problem. Collective operations like all-reduce and all-to-all synchronize thousands of accelerators during training, and the slowest transfer sets the pace for the entire job. Even small amounts of network friction directly strand significant compute capacity.

This week, Meta introduced MetaRoCE. It is described as a clean-sheet RDMA transport protocol purpose-built for AI workloads on commodity Ethernet. The design breaks with standard RoCE on its central assumption. Standard RoCE expects the network to deliver every frame in order, leveraging PFC and discouraging the packet spraying that provides performance in multiplane and large-scale networks. MetaRoCE instead treats the fabric as lossy and pushes ordering, path selection, and recovery into the NIC. Meta is releasing the specification, a reference software implementation, and a compliance test suite through the Open Compute Project (OCP)

Is it deployable?

Not yet, the artifacts possibly ships in October, 2026. Meta may release the MetaRoCE specification, a DPDK-optimized software reference implementation, and its production compliance framework at the 2026 OCP Global Summit. Hardware support is early: Meta proved it on AMD Pensando programmable NICs, with additional implementations underway from other vendors. For now this is a fabric-architecture decision, not a procurement one

The problem: the fabric sees packets, the NIC sees intent

Meta has scaled clusters to hundreds of thousands of GPUs across multiple data centers and regions. At that size the network sits in the critical path of every training step. Collective operations like all-reduce and all-to-all synchronize thousands of accelerators, and the slowest transfer sets the pace for the entire job.

Standard RoCE is the constraint. It expects the network to deliver every frame in order, leans on PFC, and discourages the packet spraying that provides performance in multiplane and large-scale networks. MetaRoCE inverts that: intelligence moves to the endpoint, and the network decomposes into many fine-grained logical paths, each with its own real-time telemetry — per-path RTT, ECN state, and utilization.

This builds directly on Meta’s 2024 RoCE-at-scale work and its broader infrastructure evolution.

Six design decisions that matter

The numbers

Meta implemented MetaRoCE on AMD Pensando programmable NICs. On a 64-node AMD GPU cluster running RCCL collectives, it was compared directly against RoCEv2 across all-reduce and all-to-all, delivering higher throughput and lower flow completion times.

The resilience result is the core statement: MetaRoCE maintains ~86% throughput at 1% packet loss and continues delivering useful bandwidth even at 10% loss rates, converging gracefully rather than collapsing. Multiplane validation across 4-plane and 8-plane topologies with up to 4,000 concurrent connections confirmed throughput scales linearly with plane count, and simulated plane failures showed traffic redistributing without application involvement or operator intervention.

Open by design

MetaRoCE extends the multi-vendor philosophy that OCP’s Ethernet Scalable Unified Network (ESUN) initiative established for the fabric into the transport layer. Three artifacts ship: the full spec via OCP, a compliance suite that lets vendors prove their implementations match, and libsoftmetaroce as the authoritative behavioral model for silicon development. Meta has proven it on AMD Pensando hardware, with additional implementations underway from other vendors.

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Key Takeaways


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